Comparison of harwdare in the loop models for a submodule of a modular multilevel converter

  • Motivation

    Modular multilevel converters (MMC) are playing an increasingly important role in the power grid, and MMC are particularly important for high-voltage direct current transmission (HVDC). The advantage of MMC over other topologies is their modular concept, consisting of a large number of submodules that are connected in series. This encourages testing newly developed control concepts for the overall system and the control units of the individual submodules using hardware- or controller-in-the-loop systems (HiL/CiL systems). This requires a model of the submodules which is as realistic as possible and needs as little computing time as possible.

    In a previous thesis, a full-bridge submodule was modeled using different approaches and partly implemented on the institute's own real-time signal processing system with an FPGA (SoC system). The first approach is based on a time-discrete switch model presented in [1]. There, each switch is modeled by a conductance and a parallel, variable current source. The second approach is a mathematical model based on the discretized differential equations of a full bridge with a capacitor [2].

     

    Task

    The thesis aims to obtain a HiL model of a submodule that is as realistic as possible by comparing the two models and which can be calculated resource-efficiently and in real time on the FPGA of the SoC system.

    For this purpose, the implementation of the first model on the FPGA must be revised. Both switch models are to be supplemented with a forward resistance and a diode. In addition, the measurement of a real MMC submodule at different operating points should improve the parameterization of the models and enable validation. Finally, the models are compared in terms of accuracy, computing time and resource consumption.

     

    [1] P. Pejovic und D. Maksimovic, „A method for fast time-domain simulation of networks with switches“, IEEE Trans. Power Electron., Bd. 9, Nr. 4, S. 449–456, Juli 1994, doi: 10.1109/63.318904.
    [2] L.-A. Gregoire et al., „Real-time simulation of modular multilevel converter on FPGA with sub-microsecond time-step“, in IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, Dallas, TX, USA, Okt. 2014, S. 3797–3802. doi: 10.1109/IECON.2014.7049065.